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ltc2921/ltc2922 series 1 29212fa applicatio s u features descriptio u typical applicatio u 2921/22 ta01 100 10 ltc2921 v cc sense 100 100 4.7k 49.9k 49.9k 169k 243k v out v fb v out v fb v out v fb 10 10 v1v2 v3 v4 gate pg gnd timer si1012r cbrst 5v supply 3.3v supply 2.5v supply si2316ds si2316dssi2316ds wsl1206 0.05 0.22 f 5v load 3.3v load 2.5v load reset 0.47 f dc/dc converter dc/dc converter dc/dc converter 100k d1d2 d3 s1s2 s3 circuit breaker reset control t gate ~ 500ms t timer ~ 130ms desktop computers plug-in cards telecom infrastructure supply sequencing instruments tracks multiple supplies with mosfet switches monitors 5 input voltages including v cc guaranteed threshold accuracy: 1% at 0.5v automatic remote sense switching adjustable supply ramp rate overvoltage monitor adjustable electronic circuit breaker adjustable power-good delay available for v cc supply voltages of 5v, 3.3v and 2.5v available in 16-pin narrow ssop (ltc2921 series)and 20-pin tssop (ltc2922 series) power supply tracker with input monitors the ltc ? 2921 and ltc2922 monitor up to five supplies and force them to track on power-up in multiple supplysystems. using external n-channel pass transistors, the supplies can be ramped up at an adjustable rate. auto- matic remote sense switching allows the dc/dc convert- ers to compensate for series voltage drops in the wiring. an incorrect level on one or more of the supplies triggers disconnect of all supplies. tight 1% accuracy and glitch immunity on the low 0.5v monitoring level ensure no false error disconnects. the ltc2921 and ltc2922 each feature an adjustable electronic circuit breaker to protect the v cc supply against short circuits. capacitance at the timer pin programs thedelays in the monitoring sequence. the ltc2921 includes three remote sense switches in a 16-pin narrow ssop package, while the ltc2922 includes five remote sense switches in a 20-pin tssop package. both parts are available for v cc supply voltages of 5v, 3.3v, and 2.5v. , ltc and lt are registered trademarks of linear technology corporation. three-supply tracker and monitor (5v, 3.3v, 2.5v) load voltage ramp-up and power-good activation 2921/22 ta01b 2.5v supply 2v/div pg 2v/div 5v load 3.3v load 2.5v load 5v supply at 5v3.3v supply at 3.3v 100ms/div outputs 2v/div downloaded from: http:///
ltc2921/ltc2922 series 2 29212fa symbol parameter conditions min typ max units supply pin v cc supply voltage typical operating range ltc2921/ltc2922 4.50 5.00 5.50 v ltc2921-3.3/ltc2922-3.3 2.97 3.30 3.63 v ltc2921-2.5/ltc2922-2.5 2.37 2.50 2.63 v i cc supply current 2m a v cc(mon) supply monitor threshold voltage ltc2921/ltc2922 4.285 4.350 4.415 v ltc2921-3.3/ltc2922-3.3 2.828 2.871 2.914 v ltc2921-2.5/ltc2922-2.5 2.265 2.300 2.335 v v cc(ov) supply overvoltage threshold ltc2921/ltc2922 5.82 6.13 6.43 v ltc2921-3.3/ltc2922-3.3 3.84 4.04 4.24 v ltc2921-2.5/ltc2922-2.5 3.08 3.24 3.40 v v cc supply voltage ...................................... C0.3v to 7v v1, v2, v3, v4 voltages ............................... C0.3v to 7v sense voltage ............................................ C0.3v to 7v timer voltage ............................. C0.3v to (v cc + 0.3v) charge pumped output voltages gate, pg ............................................ C0.3v to 12.2v switch voltages s0, d0, s4, d4 (ltc2922 series) ............ C0.3v to 7v s1, d1, s2, d2, s3, d3 ............................ C0.3v to 7v order part number t jmax = 125 c, q ja = 110 c/w absolute axi u rati gs w ww u package/order i for atio uu w (note 1) electrical characteristics consult ltc marketing for parts specified with wider operating temperature ranges. switch currents (dc, rms) s0, d0, s4, d4 (ltc2922 series) ..................... 30ma s1, d1, s2, d2, s3, d3 ..................................... 30ma operating ambient temperature range ltc2921c/ltc2922c .............................. 0 c to 70 c ltc2921i/ltc2922i ............................C40 c to 85 c junction temperature (note 2) ............................. 125 c storage temperature range ..................C65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c order part number ltc2922cfltc2922cf-3.3 ltc2922cf-2.5 ltc2922if ltc2922if-3.3 ltc2922if-2.5 t jmax = 125 c, q ja = 90 c/w top view gn package 16-lead narrow plastic ssop 12 3 4 5 6 7 8 1615 14 13 12 11 10 9 v1v2 v3 v4 s3 d3 s2 d2 timerv cc sensegate pg gnd d1 s1 12 3 4 5 6 7 8 9 10 top view 2019 18 17 16 15 14 13 12 11 so timer v1v2 v3 v4 s4 d4 s3 d3 d0v cc sensegate pg gnd d1 s1 d2 s2 f package 20-lead plastic tssop ltc2921cgnltc2921cgn-3.3 ltc2921cgn-2.5 ltc2921ign ltc2921ign-3.3 ltc2921ign-2.5 gn part marking 2921292133 292125 2921i 921i33 921i25 the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v for ltc2921/ltc2922, v cc = 3.3v for ltc2921-3.3/ltc2922-3.3, and v cc = 2.5v for ltc2921-2.5/ltc2922-2.5, unless otherwise noted. downloaded from: http:///
ltc2921/ltc2922 series 3 29212fa the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v for ltc2921/ltc2922, v cc = 3.3v for ltc2921-3.3/ltc2922-3.3, and v cc = 2.5v for ltc2921-2.5/ltc2922-2.5, unless otherwise noted. electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired.note 2: t j is calculated from the ambient temperature t a and power dissipation p d as follows: ltc2921 series: t j = t a + (p d ? 110 c/w) ltc2922 series: t j = t a + (p d ? 90 c/w) note 3: this specification applies to all switches, and is measured with v s < v d . note 4: the pg pin will rise to approximately the same voltage as the gate pin when not pulled up or pulled down by external resistance. symbol parameter conditions min typ max units v cc(uvlo) supply undervoltage lockout v cc rising 2.08 2.20 2.30 v v cc(uvh) supply undervoltage hysteresis v cc falling 120 mv electronic circuit breaker d v sense circuit breaker trip voltage d v sense = v cc - v sense 45 50 55 mv i sense sense pin input current 150 500 na t v1(dly) circuit breaker trip delay time v cc - v sense = 150mv ltc2921/ltc2922 0.5 1.5 3.0 m s ltc2921-3.3/ltc2922-3.3 0.5 1.5 3.0 m s ltc2921-2.5/ltc2922-2.5 0.5 1.5 6.0 m s t v1(rst) circuit breaker reset pulse width guaranteed not to reset 50 m s guaranteed to reset 150 m s v v1(rst) circuit breaker reset threshold voltage 0.490 0.500 0.510 v monitor inputs v mon v1-v4 monitor threshold voltages 0.495 0.500 0.505 v 0.492 0.500 0.508 v v ov v1-v4 overvoltage thresholds 0.665 0.700 0.735 v i mon v1-v4 input currents 0.1 m a timer pin v timer(th) timer ramp threshold voltage 1.15 1.20 1.25 v i timer(pu) timer pull-up current v timer = 1v C1.3 C2.0 C2.5 m a i timer(pd) timer pull-down current v cc = 2.35v, v timer = 0.4v 100 m a v timer(clr) timer cleared threshold voltage v timer falling 150 250 mv gate pin v gate gate drive output voltage ltc2921/ltc2922 10.0 11.1 12.2 v ltc2921-3.3/ltc2922-3.3 8.4 9.1 9.8 v ltc2921-2.5/ltc2922-2.5 6.1 6.8 7.5 v i gate(pu) gate pull-up current v gate = v cc C6.5 C10.0 C12.5 m a i gate(pd) gate pull-down current v cc = 2.35v, v gate = 2.35v 10 ma remote sense switches r ds(fb) feedback switch resistances (note 3) v d = v cc 21 0 w pg pin i pg(pu) pg pull-up current v pg = v cc C2.6 C4.0 C5.0 m a i pg(pd) pg pull-down current v cc = 2.35v, v pg = 2.35v 10 ma v pg(ol) pg output low voltage v cc = 2.35v, i pg = 5ma 0.4 v v pg pg output voltage (note 4) ltc2921/ltc2922 10.0 11.1 12.2 v ltc2921-3.3/ltc2922-3.3 8.4 9.1 9.8 v ltc2921-2.5/ltc2922-2.5 6.1 6.8 7.5 v downloaded from: http:///
ltc2921/ltc2922 series 4 29212fa v cc (v) 2.0 i cc (ma) 3.0 4.0 4.5 6.5 2921/2 g01 2.5 3.5 5.0 5.5 6.0 3.002.75 2.50 2.25 2.00 1.75 1.50 temperature ( c) C50 i cc (ma) 2.62.4 2.2 2.0 1.8 10 50 2921/2 g02 2921/2 g03 C30 C10 30 70 90 breaker trip (mv) 2921/2 g05 2921/2 g04 5550 45 temperature ( c) C50 i sense (na) 250200 150 100 50 0 C10 30 50 2921/2 g06 C30 10 70 90 temperature ( c) C50 C10 30 50 C30 10 70 90 monitor input threshold (v) 0.5050.500 0.495 temperature ( c) C10 30 50 C30 10 70 90 C50 temperature ( c) C10 30 50 C30 10 70 90 C50 2.0 3.0 4.0 4.5 6.5 2.5 3.5 5.0 5.5 6.0 v cc (v) timer trip voltage (v) 2921/2 g07 1.211.20 1.19 2.52.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5 temperature ( c) C50 current ( a) 70 2921/2 g08 C10 30 C30 10 50 90 pull-down current ( a) 2921/2 g09 170165 160 155 150 145 140 ltc2921-2.5ltc2922-2.5 ltc2921-3.3ltc2922-3.3 ltc2921ltc2922 ltc2921-2.5ltc2922-2.5 ltc2921-3.3ltc2922-3.3 ltc2921ltc2922 pg signal asserted pg signal asserted monitor input overdrive (mv) 0 monitor trip delay ( s) 100 8060 40 20 0 40 80 100 20 60 120 140 ltc2921-2.5ltc2922-2.5 ltc2921/ltc2922ltc2921-3.3/ltc2922-3.3 v sense = v cc v timer = 1v v timer = 0.4v supply current vs supply voltage supply current vs temperature monitor trip delay vsmonitor input overdrive monitor input threshold vstemperature circuit breaker trip voltage vstemperature sense input currentvs temperature timer trip voltagevs temperature timer pull-up current vs temperature timer pull-down currentvs supply voltage typical perfor a ce characteristics uw specifications are at t a = 25 c unless otherwise noted. downloaded from: http:///
ltc2921/ltc2922 series 5 29212fa v cc (v) 2.0 3.0 4.0 4.5 6.5 2.5 3.5 5.0 5.5 6.0 gate voltage (v) 1211 10 98 7 6 gate voltage (v) 1211 10 98 7 6 ltc2921-2.5ltc2922-2.5 ltc2921-3.3ltc2922-3.3 v cc (v) 2.0 3.0 4.0 4.5 6.5 2.5 3.5 5.0 5.5 6.0 pg (v) 1211 10 98 7 6 temperature ( c) C50 10 50 2921/2 g11 2921/2 g10 C30 C10 30 70 90 load current ( a) 4 0123 78 2921/2 g12 6 59 1 0 gate voltage (v) 1210 86 4 2 0 current ( a) 5.55.0 4.5 4.0 3.5 3.0 2.5 temperature ( c) C50 10 50 2921/2 g15 C30 C10 30 70 90 temperature ( c) C50 10 50 2921/2 g13 C30 C10 30 70 90 2921/2 g14 current ( a) gate load = 1000pf || 10m pg load = 2k to v cc v cc bypass cap = 1 f gate load = 1000pf || 10m pg load = 2k to v cc v cc bypass cap = 1 f ltc2921ltc2922 ltc2921-2.5ltc2922-2.5 ltc2921-3.3ltc2922-3.3 ltc2921ltc2922 ltc2921-2.5ltc2922-2.5 ltc2921-2.5ltc2922-2.5 ltc2921-3.3ltc2922-3.3 ltc2921-3.3ltc2922-3.3 ltc2921ltc2922 ltc2921ltc2922 11.511.0 10.5 10.0 9.59.0 8.5 v gate = v cc v pg = v cc gate load = 1000pf || 10m pg load = 2k to v cc v cc bypass cap = 1 f gate load = 1000pf || 10m pg load = 1000pf || 10m v cc bypass cap = 1 f gate voltage vs supply voltage gate voltage vs temperature gate voltage vs load current gate pull-up currentvs temperature pg pull-up current vstemperature pg voltage vs supply voltage typical perfor a ce characteristics uw specifications are at t a = 25 c unless otherwise noted. downloaded from: http:///
ltc2921/ltc2922 series 6 29212fa s0, d0 (pins 1, 20 [ltc2922]): remote switch 0. these pins are the terminals of an internal n-channel fet switchthat is enabled after the gate pin is fully ramped up. this switch can be used to connect a remote sense line to compensate for ir drop across the external fets. the gate of the internal switch ramps up at a nominal rate of 8v/ms. the pins are interchangeable, either switch pin can be tied to the load side. tie both pins to ground if unused. s4, d4 (pins 7, 8 [ltc2922]): remote sense switch 4. tie to gnd if unused.s3, d3 (pins 5, 6/pins 9, 10): remote sense switch 3. tie to gnd if unused.s2, d2 (pins 7, 8/pins 11, 12): remote sense switch 2. tie to gnd if unused.s1, d1 (pins 9, 10/pins 13, 14): remote sense switch 1. tie to gnd if unused.timer (pin 16/pin 2): timing delay input. connect a capacitor between this pin and ground to set a 600ms/ m f delay at two points in the monitoring sequence. this setsthe delay after all monitors are good, before the start of gate ramping, and the delay after the remote sense switches are on, before pg is activated. timer must fall below 150mv before a timing delay can start. the timer pin is pulled to ground at other points in the sequence. v1-v4 (pins 1-4/pins 3-6): supply monitor inputs. all four inputs must lie above the monitor threshold level (0.5v)and below the monitor overvoltage level (0.7v) for a turn- on sequence to commence or continue. when any monitor input falls outside those levels, the gate and pg pins are pulled low, disconnecting all the loads. glitch filtering on the 0.5v monitor threshold prevents low-energy voltage spikes from affecting the comparators results. v1 also serves as an active-low reset pin for the circuit breaker. tie unused monitor inputs to used monitor inputs. gnd (pin 11/pin 15): circuit ground. pg (pin 12/pin 16): power good output. a 4 m a current source from the internal charge pump rail (v pump ) pulls pg up after the turn-on sequence is complete. the outputis pulled to ground before turn-on is complete, when any monitor is out of compliance, when the circuit breaker trips, and when v cc is undervoltage. an external resistor can be added to pull up to a lower voltage and to improvepull up speed. this pin can also be configured as a gate drive for external n-channel fets in sequencing applica- tions. in applications not requiring the pg output, leave the pin unconnected. gate (pin 13/pin 17): gate drive for external n-channel fets. a 10 m a current source from the internal charge pump rail (v pump ) ramps the gates of the external n- channel mosfets forcing all supplies to track on. theresistor and capacitor network from this pin to ground sets the supplies ramp rate and enhances control loop stability. sense (pin 14/pin 18): circuit breaker sense input. an external resistor between v cc and sense sets the elec- tronic circuit breaker trip current. the breaker trips whenthe voltage across the resistor exceeds 50mv for 1 m s. to disable the circuit breaker tie sense to v cc . to reset the circuit breaker after the current falls below the trip point,pull the v1 pin below 0.5v for >150 m s or go into undervoltage lockout for >10 m s. v cc (pin 15/pin 19): supply voltage. the voltage at v cc is monitored through an internal resistive divider in a man-ner similar to the v1-v4 inputs. an undervoltage lockout circuit disables the part until the voltage at v cc is greater than 2.2v. the v cc pin must be connected to the highest supply voltage. bypass the v cc pin to ground with a 10 m f capacitor. uu u pi fu ctio s (ltc2921/ltc2922 or [ltc2922 only]) downloaded from: http:///
ltc2921/ltc2922 series 7 29212fa figure 1. ltc2921 and ltc2922 functional diagram 2921/22 f01 +C + + + + + + + + + + C C C C C C C C C C latch v overvoltage monitor overvoltage monitor overvoltage monitor overvoltage monitor overvoltage monitor control logic + + + v pump v pump v pump gate on timer done pulse timer done circuitbreaker reset pulse timer enable timerenable gate enable remotesense switch enable p g enable 4 a 2 a 10 a v cc v cc pg gate timer + C 50mv 0.5v 0.7v sense v cc v1v2 v3 v4 (ltc2922 only) d4 s4 (ltc2922 only) d3 d2 d1 (ltc2922 only) d0 s0 (ltc2922 only) s1 s2 s3 1.2v overcurrent undervoltage + switches on v swon v swon v swon remote sense switch gate reference generator and charge pump +C v pump 11.1v at v cc =5v 1.2v0.7v 0.5v gnd approximately 1v fu n ctio n al diagra uu w downloaded from: http:///
ltc2921/ltc2922 series 8 29212fa general operationthe ltc2921 and ltc2922 track multiple supplies, moni- tor multiple inputs, and provide integrated switches for remote sensing. once all input voltages lie between moni- toring and overvoltage threshold levels, in-line fets are turned on to simultaneously ramp power to the loads. the automatic remote sense switches are then activated, and the power good signal is asserted. after initial power-on the ltc2921 and ltc2922 continue monitoring the in- puts. several types of events will trigger interruption, any of which will disconnect all supplies, deactivate the power good signal, and open the remote sense switches. monitoring sequence a normal power-on sequence comprises the following steps: step 0) wait for v cc to exceed the undervoltage lockout threshold. continue checking v cc . step 1) confirm that the circuit breaker has not tripped andwait for all monitored supplies, including v cc , to be between their programmed monitor and overvoltagethresholds. continue checking these conditions. step 2) check that the timer pin voltage starts below 150mv. create a delay by ramping up the timer pin until it trips an internal comparator. step 3) ramp the gate pin to turn on the external n-channel fets, simultaneously ramping the supplies into their loads. await confirmation of full gate enhancement, i.e., gate voltage within ~1v of v pump . continue checking this condition.step 4) activate the remote sense switches. await confir- mation of full feedback switch gate enhancement. step 5) wait again for another timer cycle delay. step 6) release the pull-down on the pg output. continue checking v cc , the circuit breaker, the input voltages, and the gate voltage.interrupting events three events can interrupt the sequence and trigger imme- diate disconnect of all supplies, pull-down of the pg signal, and deactivation of the remote sense switches. thethree interrupting events are a lockout, a fault, and an error. a lockout occurs when v cc falls below the undervoltage threshold (including hysteresis). escape from lockoutrequires sufficient v cc voltage. leaving lockout, the se- quence begins at step 1. a lockout condition supersedesfaults and errors. a fault occurs when the circuit breaker trips. escape from a fault requires pulsing the v1 pin below the reset thresh- old of 0.5v(nom) for more than 150 m s after the current falls below the trip point. when v1 returns high, thesequence begins from step 1. an undervoltage lockout of >10 m s also clears the circuit breaker fault latch. a fault condition supersedes errors.an error occurs when one or more of the monitor inputs (v1-v4 pins) or v cc falls below its monitor threshold, or rises above its overvoltage threshold. a loss of voltage onthe gate pin, once it has fully ramped up, also causes an error. an error sends the sequence to step 1. feedback switches for remote sensing the integrated n-channel switches of the ltc2921/ ltc2922 automatically compensate for the voltage drops caused by the r ds(on) of the external load-control mos- fet switches. this is accomplished by modifying thenormal feedback path of each power supply that is con- trolled by the ltc2921/ltc2922. when the load-control switches are off, the remote sense switches are also off, and the power supply uses its normal feedback path to sense its output voltage. after the load-control switches are turned on, the remote sense switches are turned on to create dominating feedback paths. the feedback loops include the load-control switches, thus compensating for their voltage drops. in order to eliminate glitching on the output of the power supply, the remote sense switches are turned on at a controlled rate of about 8v/ms. the gates of these inte- grated n-channel devices are pulled up above v cc to v pump so as to provide a low-resistance path for a wide range of voltages. operatio u downloaded from: http:///
ltc2921/ltc2922 series 9 29212fa electronic circuit breakerplacing a resistor between the v cc and sense pins allows the part to detect shorts and excessive currents on the v cc supply. the electronic circuit breaker trips when thevoltage across the resistor is >50mv for more than 1 m s. a trip causes a fault condition which interrupts the monitor operatio u sequence, and which requires reset of the circuit breakerlatch (see interrupting events section). breaker reset is achieved by pulling v1 below the reset threshold for >150 m s after the current falls below the trip point, or by returning from undervoltage lockout on v cc . the timing of a typical start-up sequence for the ltc2921/ltc2922 is shown in figure 2. v cc exceeds the undervoltage lockout level at time 0. all monitor inputs settle betweenthe 0.5v monitor threshold and the 0.7v overvoltage threshold by time 1, then a timer cycle starts. the timer pin reaches 1.2v at time 2, and gate ramping begins. when the gate ramp completes at time 3, the automatic remote sense switches close. another timer delay begins at time 4 and finishes at time 5, at which time pg is activated. the timing of a monitor failure and subsequent regularturn-on is shown in figure 3. prior to time 1, a successful turn-on sequence had completed. at time 1, monitor v2 falls below the 0.5v reference, triggering an error. the gate pin, pg pin, and the remote sense switches fall at rates determined by the pull-down currents and loading conditions of each (times 2, 3, 4). at time 5, monitor v2 recovers, and a normal turn-on sequence begins. ti i g diagra s w u w v cc sense v1v2 v3 v4 timer gate pg 012 345 0.7v0.5v 0.7v0.5v 0.7v0.5v 0.7v0.5v v cc v cc v cc -50mv 1.2v 1.2v undervoltagelockout level remote sense switch gate v cc sense v1v2 v3 v4 timer gate pg 1234 5 0.7v0.5v 0.7v0.5v 0.7v0.5v 0.7v0.5v 0.7v0.5v v cc v cc v cc -50mv 1.2v 1.2v undervoltage lockout level remote sense switch gate figure 2. typical start-up sequence figure 3. monitor failure and start-up sequence timing downloaded from: http:///
ltc2921/ltc2922 series 10 29212fa the timing of a circuit breaker trip and reset, and asubsequent regular turn-on are shown in figure 4. prior to time 1, a successful turn-on sequence had completed. at time 1, excessive current pulls sense more than 50mv below v cc . the gate pin, pg pin, and the remote sense switches fall at rates determined by the pull-down currents and loading conditions of each (times 2, 3, 4). note that theexcessive current condition ceases at time 4. a circuit breaker reset pulse is initiated at time 5. the latch resets at time 6 since the v1 pulse is wide enough. a normal turn- on begins when v1 rises above the monitor threshold (time 7 onward). multiple supply systems have become common to accom-modate circuits on the same board with different voltage requirements. desktop pc motherboards, instrumenta- tion circuits and plug-in boards of all kinds often require tracking and control of several supply voltages. the ltc2921 and ltc2922 ramp and monitor up to five supply voltages in such systems. external resistive volt- age dividers independently program four monitor levels, while an internal divider sets the v cc pin supply monitor level. time delays in the monitoring sequence are set by anexternal capacitor at the timer pin. the gate pin provides a high side drive voltage appropri- ate to logic-level and sublogic-level n-channel power ti i g diagra s w u w v1v2 v3 v4 0.7v0.5v 0.7v0.5v 0.7v0.5v 0.7v0.5v v cc v cc v cc -50mv v cc v cc -50mv 1.2v 1.2v 1234 67 5 v cc sense timer gate pg remote sense switch gate internal circuit breaker latch undervoltage lockout level applicatio s i for atio wu uu figure 4. circuit breaker trip, reset and start-up sequence timing mosfets. the external rc network on gate programsthe supply ramp rate and eliminates possible high fre- quency oscillations in the power path. featured in the ltc2921/ltc2922 series are sub-10 w internal remote sense switches to compensate for voltage drops betweenthe supplies and the loads. at the end of a successful power-on sequence, the ltc2921/ ltc2922 asserts the pg output. a typical application uses an external pull-up resistor between pg and the load side of a supply. in applications where supply power-on se- quencing is required, the pg pin can function as a second, separate high side driver. downloaded from: http:///
ltc2921/ltc2922 series 11 29212fa applicatio s i for atio wu u u figure 5. basic monitor connection setting the supply monitor levelsthe ltc2921 and ltc2922 series both feature low 0.5v monitoring thresholds with tight 1% accuracy. to set a supply monitoring level tightly, design a precision ratio resistive divider to relate the lowest valid supply voltage to the maximum specified monitor threshold voltage. use resistors with 1% tolerance or better to limit the error due to mismatch. the basic resistive divider connection for supply monitoring is shown in figure 5. 2921/22 f05 ltc2922 v1 gnd gate v q1 q1 c gate load i mon i a1 r b1 r y1 r z1 r a1 v l1 v v1 v src1 r g1 10 v out v fb gnd dc/dc converter +C 0.1 a first, divide the nominal monitor threshold voltage by anacceptable bias current (i a1 ), and choose a nearby stan- dard value for resistor r a1 (see equation 1). next, calculate the bounds on the value of r b1 that guarantee that the divided minimum supply voltage ex-ceeds the maximum specified monitor threshold voltage, and that the minimum specified overvoltage threshold exceeds the divided maximum supply voltage. use equa- tions 2 and 3 to calculate r b1(max) and r b1(min) from r a1 , the resistor tolerance (rtol), the supply voltage, themonitor threshold and overvoltage specifications, and the monitor pin leakage current specification. when the integrated remote sensing switch is closed, the dc/dc converter will compensate for the ir drop from drain to source of the external n-channel fet (v q1(on) ) by increasing the supply voltage by the same amount. calcu-late with v q1(on)(max) = 0v if the remote sense switch is not used. r v i a a 1 1 0 500 = . (1) rr rtol rtol vv va r b max a src min a 1 1 1 1 1 1 0 505 0 505 0 1 () () ? C ? C. .. ? = + ? ? ?? +m ? ? ?? (2) rr rtol rtol vv v va r b min a src max q on max a 11 11 1 1 1 0 665 0 665 0 1 () () () () ? C ? C. .C .? = + ? ? ?? + m ? ? ?? (3) choose a standard resistor value for r b1 that satisfies the inequality of equation 4. r b1(min) r b1 r b1(max) (4) when several standard values meet the requirement,choose the value closest to r b1(max) to set the tightest monitor threshold. this also allows more headroom forlarger v q1(on)(max) . alternatively, choose the standard value closest to r b1(min) to set the tightest overvoltage threshold.all four monitor input voltages must be between the monitor threshold and the overvoltage threshold for the turn-on sequence to begin. connect unneeded monitor input pins to any of the utilized monitor input pins. selecting the external n-channel mosfets the gate pin drives the gate of external n-channel mosfets above v cc to connect the supplies to the loads. the gate drive voltage provided by the ltc2921/ltc2922series is best suited to logic-level and sublogic-level power mosfets. to achieve the lowest switch resistance, the v cc pin must be connected to the highest supply voltage.consider the application requirements for current, turnoff speed, on-resistance, gate-source voltage specification, etc. refer to the electrical specifications and typical performance curves to determine the gate voltages for given v cc voltages over the required range of conditions. calculate the minimum gate drive voltage for each moni-tored supply for use in selecting the fets. check the maximum gate voltage against the fets gate-source downloaded from: http:///
ltc2921/ltc2922 series 12 29212fa voltage specifications. on-resistance is a critical param-eter when choosing power mosfets. the integrated remote sense switches compensate for ir drops, but minimizing v q(max) leaves more margin for designing the resistive voltage divider for the monitors.setting the gate ramp rate application of power to the loads is controlled by setting the voltage ramping rate with an external capacitor on the gate pin. during step 3 of the monitoring sequence, a 10 m a pull-up ramps the gate pin capacitance up to v pump , the internal charge pump voltage. use equation 5 to calculate the nominal gate pin capacitance necessaryto achieve a given ramp rate, d v/ d t: c a vt gate = m dd 10 / (5) alternatively, to calculate the gate capacitor to achieve adesired nominal ramp time, use equation 6. the gate drive voltage (v gate ) varies with v cc voltage. consult the electrical characteristics table and typical performancecurves to choose an appropriate value to insert for v gate . c at v gate ramp gate = m 10 ? (6) when the gate pin drives several fets in parallel, the loadvoltages ramp together at the same rate until the lowest supply reaches its full value. the other supplies continue to track until the next lowest supply reaches its full value, and so on. the gate pin must not be forced above the level it reaches when fully ramped. an internal clamp limits the gate voltage to 12.2v relative to ground. damp possible ramp-on oscillations by including a 10 w resistor in series with each external n-channel gate, and asnecessary, a 0.1 m f capacitor on each external n-channel drain, as shown in figure 6.setting the sequence delay timer the turn-on sequence includes two programmable delays set by the capacitance on the timer pin. more precisely, a single delay value is used at two points in the sequence. applicatio s i for atio wu uu in both cases, the delay provides a measure of confidencethat conditions are stable enough for the sequence to advance. the first timer delay begins once all monitor voltages comply with their thresholds, the electronic circuit breaker has not tripped, and v cc is not undervoltage. the timer pin sources 2 m a into an external capacitor, which ramps its voltage. a comparator trips when the timer pin voltagereaches the internal 1.2v reference, then the gate ramp begins, and timer is pulled to ground. the second timer delay begins after the gate of the remote sense switches is fully ramped up. after the timer ramp completes, the pg pin is activated. an internal circuit pulls-down the timer pin with >100 m a of current at all times, except during the ramping periods, and when v cc is undervoltage. calculate the nominal value for the timing capacitor byinserting the desired delay into equation 7: c a v t timer dly = m 2 12 . ? (7) for delay times below 60 m s, be sure to limit stray capaci- tances on the timer pin by using good pcb designpractices. to program essentially no delay (<1 m s), float the timer pin.internal circuitry guarantees that the timer pin is pulled below 150mv (typical) before a delay cycle can begin. ltc2922 gnd gate r g2 10 r g1 10 r g0 10 q2 q1 q0 c gate c d2 0.1 f (opt) c d1 0.1 f (opt) c d0 0.1 f (opt) v src2 v src1 v src0 2921/22 f06 v l2 v l1 v l0 figure 6. ramping and damping components on gate pin downloaded from: http:///
ltc2921/ltc2922 series 13 29212fa applicatio s i for atio wu uu electronic circuit breakerthe ltc2921/ltc2922s electronic circuit breaker pro- tects against excessive current on v cc . the circuit breaker trips when the sense pin falls more than 50mv below thev cc pin for more than 1 m s. when the breaker trips, the remote sense switches are opened and the pg and gatepins are pulled to ground, disconnecting the supplies. an internal latch guarantees that the monitoring sequence cannot start until the breaker is reset. to reset the circuit breaker, cycle the v1 input below 0.5v(nom) for more than 150 m s. v cc falling below the undervoltage threshold also resets the breaker. after reset, the sequence returns tostep 1, awaiting valid monitor levels. figure 7 shows an equivalent schematic for the electronic circuit breaker function. using equation 8, set the circuit breaker by selecting r sense to drop less than the mini- mum d v sense at the desired trip current: r v i sense sense min lo trip d () () (8) after selecting a resistor, use equations 9a and 9b tocalculate the actual minimum and maximum trip current threshold limits: i v r trip min sense min sense max () () () = d (9a) i v r trip max sense max sense min () () () = d (9b) be mindful of thermal effects and power ratings whenchoosing a resistor. place r sense as close as possible to the ltc2921/ltc2922 pins to reduce noise pickup, anduse kelvin sensing to ensure accurate measurement of the voltage drop. in applications not requiring the current sensing circuit breaker, tie the sense pin to the v cc pin. configuring the pg pin outputthe ltc2921 and ltc2922 each include a power good indicator, the pg pin. during the turn-on sequence, and upon detection of errors, a strong fet pulls pg to ground with >10ma of current. when all supplies have satisfied their monitor and overvoltage thresholds, the circuit breaker has not tripped, the gate pin has reached its peak, and the remote sense switches have turned on, a 4 m a current source from v pump pulls up pg. configure pg as a logic signal by adding an external pull-up resistor to a voltage source. for example, create a negative-logic system reset signal by adding an external pull-up resistor to the load side of a supply voltage, as in figure 8. calculate the minimum pull-up resistor value that meets the output low voltage specification for v pg(ol) : r vv ma pg min lo max () () . = - 04 5 (10) do not pull pg above the gate pins fully ramped voltage.an internal clamp limits the pg voltage to 12.2v relative to ground. in applications that do not require the pgoutput, leave the pin unconnected. the pg output can also be used as the gate drive for external n-channel mosfets, as in figure 9. the delay between the gate ramp and the pg activation makes a supply sequencer, useful when two supplies (or two groups of supplies) need to be ramped one after another. choose the fets and design the ramp rate in the same way as for the gate pin. refer to equations 5 and 6, substitut- ing 4 m a for 10 m a, to choose capacitor c pg . integrated switches for remote sensinga significant feature of the ltc2921/ltc2922 series is a set of remote sense switches that allow for compensation of voltage drops in the load path. switch activation occurs in the turn-on sequence after the gate figure 7. circuit breaker functional schematic gate enable control logic v pump v pump v pump switch enable pg enable 4 a 4 a pg gate remote sense switch gate latch v pulse width meas. + + C 50mv v cc sense r sense overcurrent comparator v1 v lo i lo v src0 gnd c gate r g0 10 2921/22 f07 q0 load ltc2922 downloaded from: http:///
ltc2921/ltc2922 series 14 29212fa applicatio s i for atio wu uu pin has fully ramped up. the switches are n-channelmosfets whose gates are ramped from ground to v pump at a nominal rate of 8v/ms. the pg pin is activated uponcompletion of the timer delay cycle that follows gate ramp-up and remote sense switch activation. when con- ditions indicate a supply disconnect, the switches shut off in less than 10 m s. figure 10 shows an example of how to connect a switch toremote sense the load voltage. although only one remote sense switch is referred to in this section, the calculations and comments apply to all. before the activation of q1 and the internal switch, resistor r x1 provides a direct path between the dc/dc converters output voltage and its feedback network (r y1 and r z1 ). once q1 activates, the supply energizes the load. whenthe internal switch turns on, it provides a remote sense path between the load voltage and the converters feed- back network. to choose a value for resistor r x1 , consider the remote sense switch connection equivalent network in figure 11.resistor r q1(on) represents the on-resistance of q1, and resistor r fb1(on) represents the on-resistance of the inter- nal switch.to allow the load voltage to dominate the feedback to the converter when the internal switch is closed, make r x1 >> r fb1(on) . to set the converter feedback ratio accurately with r y1 and r z1 , make both r x1 and r fb1(on) much less than (r y1 + r z1 ). to ensure that most of the load current flows through the external n-channel fet, choose (r x1 + r fb1(on) ) >> r q1(on) . summarized, these requirements amount to: r q1(on) , r fb(on) << r x1 << (r y1 + r z1 ) (11) approach the selection of r x1 in the following way: design the dc/dc converter feedback based on the resistivedivider formed by r y1 and r z1 with v s1 at the desired supply voltage value. when the resistor values satisfyequation 11, equations 12 through 15 are valid. pg enable 4 a pg v cc sense r sense gate v l0 v src0 gnd c gate r g0 10 r pg 2921/22 f08 q0 ltc2922 c reset v pump pg enable 4 a pg v cc sense r sense gate v l0 v l5 v src0 v src5 gnd c gate c pg r g0 10 r g5 10 2921/22 f09 q0 q5 ltc2922 v pump 2921/22 f10 r x1 r y1 r z1 v src1 v out v fb gnd dc/dc converter ltc2922 v1 gnd gate q1 c gate load r b1 r g1 10 r a1 v l1 s1 d1 v s1 2921/22 f11 ltc2922 s1 d1 load i ds1 i q1 r x1 r fb1(on) r q1(on) r y1 r z1 v src1 v l1 v s1 i l1 v out v fb gnd dc/dc converter figure 9. pg pin as sequenced n-channel gate driver figure 8. pg pin as logic output figure 10. automatic remote sense switching connection figure 11. remote sense switch connection equivalent network downloaded from: http:///
ltc2921/ltc2922 series 15 29212fa applicatio s i for atio wu uu before q1 closes to connect the load, the actual supplyvoltage relative to v s1 is given by equation 12. d= = ++ ? ? ?? vvvv r rrr src src s s x xyz 1111 1 111 C? (12) after both q1 and the internal remote sense switch haveclosed, the load voltage relative to v s1 is given by equation 13. d= = ? ? ?? vvv ir r r lls lqo n fb on x 111 11 1 1 CC ? ? () () (13) a small part of the load current will flow through theremote sense switch. use equation 14 to calculate the current, and do not exceed the switch current absolute maximum rating when choosing the value of r x1 . ii r r ds l qon x 11 1 1 = ? ? ?? ? () (14) in addition, once the remote sensing is active, the supplyvoltage v src1 will rise by approximately the drop across the external fet. the effect on the monitor resistive dividerdesign has already been accounted for in the previous section, setting the supply monitor levels. vvi r r r vv src s l q on fb on x sq o n 1111 1 1 11 1 =+ ? ? ?? ?+ ?? C () () () (15) the terminals of each switch are interchangeable; choosethe connections to optimize the board layout. ground all unused switch pins. design example consider the design of a three-supply monitoring system, as shown in figure 12, with specifications as listed in table? 1. table 1. design example electrical specifications supply specifications 5v 7.5% v src0(max) = 5.375v i l0 = 0.8a (max) v src0(min) = 4.625v 3.3v 7.5% v src1(max) = 3.5475v i l1 = 1.6a (max) v src1(min) = 3.0525v 2.5v 7.5% v src2(max) = 2.6875v i l2 = 0.4a (max) v src2(min) = 2.3125v external n-channel fet drain-source voltage specification 5v supply v q0(on)(max) < 250mv 3.3v supply v q1(on)(max) < 250mv 2.5v supply v q2(on)(max) < 150mv timing specification timer delay t dly = 150ms (nom) gate ramp time t ramp = 500ms (nom) bias current specification monitor resistive i a1 = 10 m a (nom) divider current i a2 = 10 m a (nom) other requirements ? remote sense all 3 load voltages? tight monitoring levels ? use circuit breaker function ? dc/dc converter feedback resistive divider >100k w the ltc2921 suits this application because the largestsupply in the system is 5v, and only three remote sense switches are required. start with the design of the resistive dividers that set the monitor levels. as the largest supply voltage, the 5v supply must be connected to the v cc pin; an internal resistive divider sets that monitor level. consult theelectrical characteristics table to confirm that v src0(min) >v cc(mon)(max) and v src0(max) ltc2921/ltc2922 series 16 29212fa applicatio s i for atio wu uu selecting r b1 = 243k satisfies the range restrictions be- low: rk vv vak k rk vvv v b max b min 11 49 9 1001 1001 3 0525 0 505 0 505 0 1 49 9 244 3 49 9 1001 1001 3 5475 0 250 0 665 0 665 0 1 ()() .? C. . ? .C . .. ? . . .? . C. ? .. C . .C . = + ? ? ?? +m ? ? ?? = = + ? ? ?? + mm ? ? ?? = ak k ?. . 49 9 241 6 similar calculations for the 2.5v supply yield suitablestandard 1% values of r a2 = 49.9k and r b2 = 169k. r v a kk rk vv vak k rk v a b max b min 2 22 0 500 10 50 49 9 49 9 1001 1001 2 3125 0 505 0 505 0 1 49 9 173 3 49 9 1001 1001 2 6875 = m =? = + ? ? ?? +m ? ? ?? = = + ? ? ?? . . .? C. . ? .C . .. ? . . .? . C. ? . ()() ++ m ? ? ?? = 0 150 0 665 0 665 0 1 49 9 167 6 .C . .C .?. . vv vak k tie the unused v3 and v4 monitor pins to v2 for properoperation. 2921/22 f12 r x0 100 r g0 10 ltc2921 v cc sense r x1 100 r x2 100 r24.7k r a2 49.9k 1% r a1 49.9k 1% r b2 169k 1% r b1 243k 1% v out v fb v out v fb v out v fb r g1 10 r g2 10 v1v2 v3 v4 s1 s2 s3 gate pg d1d2 d3 gnd timer qrst si1012r cbrst 5v = 7.5%3.3v = 7.5% 2.5v = 7.5% q0 si2316ds q1si2316ds q2si2316ds r sense wsl1206 0.05 , 1% c timer 0.22 f 10v 5v load 0.8a max 3.3v load 1.6a max 2.5v load 0.4a max reset c gate 0.47 f 25v c d0 0.1 f 25v c d1 0.1 f 25v c d2 0.1 f 25v c byp 10 f 25v dc/dc converter dc/dc converter dc/dc converter r1 100k circuit breaker reset control 15 14 1312 10 8 6 16 11 12 3 4 9 7 5 figure 12. design example of a three-supply tracker and monitor (5v, 3.3v, 2.5v) downloaded from: http:///
ltc2921/ltc2922 series 17 29212fa applicatio s i for atio wu uu next, consider the supply ramping n-channel mosfetsq0, q1 and q2. transistor q0 will have >4.5v of gate- source voltage, even at maximum supply voltage (5.375v) and minimum gate pin voltage (10v). considering the voltages, temperatures, and currents involved, the maxi- mum on-resistance (r q(on)(max) ) of the vishay siliconix si2316ds is about 150m w . switches q1 and q2 will see even higher gate-source voltages, implying even smallerr q(on)(max) values. table 2 summarizes the calculated v q(on)(max) voltages. include the additional 50mv drop across r sense when budgeting for the v cc supply path. table 2. external mosfet drain-source voltage drops supply external r q(on) i l v q(on) voltage mosfet max max max 120mv 5v q0 ~150m w 0.8a (+50mv = 170mv) 3.3v q1 <150m w 1.6a <240mv 2.5v q2 <150m w 0.4a <60mv the 20v absolute maximum gate-source voltage rating of the si2316ds easily accommodates this design.next, calculate the necessary capacitance on the gate pin to realize the desired ramp rate. use the nominal value of v gate from the electrical specification, and choose a standard value. c am s v ff gate = m =m ?m 10 500 10 8 0 463 0 47 ? . .. include drain bypass capacitors of 0.1 m f and series gate resistors of 10 w on each external power fet to damp turn- on oscillations.find the capacitance at the timer pin required to set the delays in the power-on sequence: c a v ms f f timer = m =m?m 2 12 150 0 25 0 22 . ?.. the application requires the use of the circuit breakerfunction on the v cc supply. first, find the upper limit on the sense resistor value: r mv a m sense = w 45 08 53 25 . . select a precision power sense resistor, such as thevishay dale wsl1206 series. they can be specified to 1%, and exhibit <1% variation over the ltc2921/ltc2922 operating range; choose r sense = 50m w . including toler- ances, the circuit breaker trip current threshold variationwill be: i mv m a i mv m a trip min trip max ()() . . = w = = w = 45 51 088 55 49 112 the pg pin is configured as a 2.5v negative-logic resetsignal for the microcontroller. the minimum pull-up resis- tance for proper operation is: r vv ma pg min () .C . =? w 2 6875 0 4 5 460 figure 13 shows r pg = 4.7k. the value is somewhat arbitrarily chosen, but it does limit the pull-down currentto <500 m a. trade off lower pull-down currents against faster pull-up edge rates in other applications.recall that proper operation of the remote load sensing function requires: r q(on) , r fb(on) << r x << (r y +r z ) in this example, the operating conditions and the si2316dsgive r q(on)(max) = 150m w , the electrical characteristics table guarantees r fb(on) < 10 w , and the example design specification requires that (r y + r z ) <100k. selecting r x0 = r x1 = r x2 = 100 w satisfies the inequality. before the loads are connected to the supplies, the voltageerror due to the r x resistors will be <0.1% for all three supplies: d= w ? ? ?? == vv k v of v src src src src ?. % 100 100 1000 01 after the remote sense switches close, the load voltageerrors due to r x at maximum loads will be: downloaded from: http:///
ltc2921/ltc2922 series 18 29212fa applicatio s i for atio wu uu d= w w w ? ? ?? = = d= w w w ? ? ?? = = d= w w w ? ? ?? = = va m m v of v va m m v of v va m m v of l l l 0 1 2 0 8 150 10 100 12 024 5 1 6 150 10 100 24 073 33 0 4 150 10 100 6 024 2 C. ? ? C C. % C. ? ? C C. % . C. ? ? C C. % .5 5v confirm that the currents through the remote senseswitches are less than the absolute maximum ratings: the pull-down transistor q5 on the v1 pin is a circuitbreaker reset mechanism. choose the transistor to pull down v v1 below the reset threshold under worst-case conditions, and choose a gate-grounding resistor basedon speed and current considerations. the vishay siliconix si1012r and a 100k resistor proved sufficient for this design. finally, bypass the v cc pin with a 10 m f capacitor. typical applicatio s u five-supply tracker and monitor (3.3v, 2.5v, 1.8v, 1.5v, 1.2v) 2921/22 ta02 r g2 10 ltc2922-3.3 v cc sense r24.7k r a4 49.9k 1% r a3 49.9k 1% r b4 60.4k 1% r b3 86.6k 1% v out v fb v out v fb v out v fb r g3 10 r g4 10 v1v2 v3 v4 s0 s1 s2 s3 s4 gate pg d0d1 d2 d3 d4 gnd timer qrst si1012r cbrst 1.8v 5% 1.5v 5% 1.2v 5% q2si2316ds q3 si2316ds q4 si2316ds r sense wsl1206 0.05 , 1% c timer 0.22 f 10v 1.8v load 1.6a max 1.5v load 1.4a max 1.2v load 1.2a max reset c gate 0.47 f 25v c d2 0.1 f 25v c d3 0.1 f 25v c d4 0.1 f 25v c byp 10 f 25v dc/dc converter dc/dc converter dc/dc converter v out v fb v out v fb r g0 10 r g1 10 3.3v 10% 2.5v 5% q0si2316ds q1 si2316ds 3.3v load 0.8a max 2.5v load 2.3a max c d0 0.1 f 25v c d1 0.1 f 25v dc/dc converter dc/dc converter r a2 49.9k 1% r b2 113k 1% r a1 49.9k 1% r b1 178k 1% r x0 100 r x1 100 r x2 100 r x3 100 r x4 100 r1 100k 19 18 1716 20 14 12 10 8 2 15 7 9 11 1 6 5 4 3 13 circuit breaker reset control pg pin as reset with pull-up to 2.5v ia m ma ia m ma ia m ma ds dsds 1 23 08 150 100 12 16 150 100 24 04 150 100 06 = w w ? ? ?? = = w w ? ? ?? = = w w ? ? ?? = .? . .? . .? . downloaded from: http:///
ltc2921/ltc2922 series 19 29212fa f package 20-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1650) gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) package descriptio u f20 tssop 0502 0.09 C 0.20 (.0036 C .0079) 0 C 8 0.45 C 0.75 (.018 C .030) 4.30 C 4.50** (.169 C .177) 6.40 bsc 134 5 6 7 8910 1112 14 13 6.40 C 6.60* (.252 C .260) 20 19 18 17 16 15 1.10 (.0433) max 0.05 C 0.15 (.002 C .006) 0.65 (.0256) bsc 0.195 C 0.30 (.0077 C .0118) 2 millimeters (inches) dimensions do not include mold flash. mold flash shall not exceed .152mm (.006") per side dimensions do not include interlead flash. interlead flash shall not exceed .254mm (.010") per side * ** note:1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale recommended solder pad layout 0.45 0.05 0.65 typ 4.50 0.10 6.60 0.10 1.05 0.10 gn16 (ssop) 0502 12 3 4 5 6 7 8 .229 C .244 (5.817 C 6.198) .150 C .157** (3.810 C 3.988) 16 15 14 13 .189 C .196* (4.801 C 4.978) 12 11 10 9 .016 C .050 (0.406 C 1.270) .015 .004 (0.38 0.10) 45 0 C 8 typ .007 C .0098 (0.178 C 0.249) .053 C .068 (1.351 C 1.727) .008 C .012 (0.203 C 0.305) .004 C .0098 (0.102 C 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 C .165 .0250 typ .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note:1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. downloaded from: http:///
ltc2921/ltc2922 series 20 29212fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2003 lt/tp 0404 1k rev a ? printed in usa related parts typical applicatio u part number description comments ltc2900 programmable quad supply monitor adjustable reset timer, 10-lead msop package ltc2901 programmable quad supply monitor with watchdog adjustable reset timer and watchdog timer, individual comparator outputs ltc2902 programmable quad supply monitor adjustable reset timer, selectable tolerance, reset disable for margining. ltc4211 hot swap controller with multifunction current control operates from 2.5v to 16.5v, 10-lead msop package ltc4230 triple hot swap controller with multifunction current control operates from 1.7v to 16.5v, supply tracking early-late supply sequencer with early supplies led indicator 2921/22 ta03 r g2 10 ltc2922 v cc sense r a4 49.9k 1% r a3 49.9k 1% r b4 162k 1% r b3 232k 1% v out v fb v out v fb v out v fb r g3 10 r g4 10 v1v2 v3 v4 s0 s1 s2 s3 s4 gate pg d0d1 d2 d3 d4 gnd timer qrst si1012r cbrst 1.8v 5% 3.3v 10% 2.5v 10% q2si2316ds q3 si2316ds q4 si2316ds r sense wsl1206 0.05 , 1% c timer 0.22 f 10v 1.8v early 1.5a max 3.3v late 2.5v late c gate 0.47 f 25v c d2 0.1 f 25v c d3 0.1 f 25v c d4 0.1 f 25v c byp 10 f 25v dc/dc converter dc/dc converter dc/dc converter v out v fb v out v fb r g0 10 r g1 10 5v 10% 2.5v 5% q0si2316ds q1 si2316ds 5v early 0.8a max 2.5v early 1.5a max c d0 0.1 f 25v c d1 0.1 f 25v dc/dc converter dc/dc converter r a2 49.9k 1% r b2 113k 1% r a1 49.9k 1% r b1 169k 1% r x0 100 r x1 100 r x2 100 r1 100k c pg 0.22 f 25v 19 18 1716 20 14 12 10 8 2 15 7 9 11 1 6 5 4 3 13 circuit breaker reset control pg pin as sequenced gate driver early voltages on r6330 t gate ~ 500ms t pg ~ 600ms downloaded from: http:///

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